3 papers
cs.AI2026
MicroEvo: Knowledge-Guided LLM Sampling for Efficient Microarchitecture Design Space Exploration
Jia Xiong, Runkai Li, Chenxu Niu +11
Microarchitecture design space exploration suffers from expansive search spaces and expensive PPA evaluation, leaving only a small simulation budget for design decision-making. Exi…
cs.AR2026
ChatHLS: Towards Systematic Design Automation and Optimization for High-Level Synthesis
Runkai Li, Jia Xiong, Xiuyuan He +5
High-Level Synthesis (HLS) improves IC development productivity by enabling hardware design from C-like languages. However, strict coding constraints and design-specific optimizati…
cs.AR2025
iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs
Runkai Li, Jia Xiong, Xi Wang
High-Level Synthesis (HLS) serves as an agile hardware development tool that streamlines the circuit design by abstracting the register transfer level into behavioral descriptions,…