2 papers
cs.SE2026
MechMem-RTL: Reusing Verified Mechanism Memories for LLM-Based RTL Repair
Mingyu Cheng, Junjie Gao, Jinhua Cui +1
Large language models (LLMs) can automatically repair register-transfer-level (RTL) designs. However, fixing complex sequential logic errors requires reusing past debugging experie…
cs.CR2024
BETA: Automated Black-box Exploration for Timing Attacks in Processors
Congcong Chen, Jinhua Cui, Jiliang Zhang
Modern processor advancements have introduced security risks, particularly in the form of microarchitectural timing attacks. High-profile attacks such as Meltdown and Spectre have…