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Suranga Handagala

3 papers hereh-index 8256 citations22 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author2

Across the 2 of 3 papers where every author was matched, so the position is known.

fields
  • cs.AR1
  • cs.DC1
  • cs.NI1

identity via Semantic Scholar / OpenAlex

most citedLUTMUL: Exceed Conventional FPGA Roofline Limit by LUT-based Efficient Multiplication for Neural Network Inference

6 citations · 6 across the 1 of their papers we have counts for

collaborators

3 papers

cs.NI2026

High Speed Network Processing for Scientific Computing in the Open Cloud Testbed

Miriam Leeser, Michael Zink, Suranga Handagala +3

This paper presents an FPGA-based SmartNIC architecture designed to address critical network challenges in data-intensive scientific computing. As scientific workflows increasingly…

cs.DC2026

LatencyLab: A DPDK-Based P4 Pipeline Latency Measurement Framework for FPGA SmartNICs

Pavani Kuppili, Zhaoyang Han, Yicheng Qian +4

P4-programmable FPGA SmartNICs place packet processing directly on the wire, but open FPGA P4 toolflows do not expose timestamping at the pipeline boundary, so the latency a P4 pro…

cs.AR2024★ 6 cited

LUTMUL: Exceed Conventional FPGA Roofline Limit by LUT-based Efficient Multiplication for Neural Network Inference

Yanyue Xie, Zhengang Li, Dana Diaconu +3

For FPGA-based neural network accelerators, digital signal processing (DSP) blocks have traditionally been the cornerstone for handling multiplications. This paper introduces LUTMU…

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