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most citedTime performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process

5 citations · 6 across the 2 of their papers we have counts for

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physics.ins-det2024★ 5 cited

Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process

Gianluca Aglieri Rinella, Luca Aglietta, Matias Antonelli +43

In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high ene…