activity
20092026
most citedInfrastructure for Detector Research and Development towards the International Linear Collider

2 citations · 2 across the 5 of their papers we have counts for

collaborators

6 papers

physics.ins-det2026

Development for the Belle II vertex detector upgrade with depleted monolithic active pixel sensors

Y. Onuki, M. Babeluk, T. Bergauer +85

The vertex detector upgrade project for the Belle II experiment, based on CMOS depleted monolithic active pixel sensor technology, is planned to be carried out in conjunction with…

physics.ins-det2026

Application of exhaustive simulation flow for advanced performance prediction of monolithic active pixel sensors

E. Sacchetti, M. Babeluk, T. Bergauer +86

Monolithic active pixel sensor (MAPS) developments have pushed the detection performance in various directions, especially relative to timing where nanosecond-level precision is no…

physics.ins-det2022

CMOS pixel sensors optimized for large ionizing dynamic

W. Ren, J. Baudot, L. Federici +9

Monolithic active pixel sensors (MAPS) are now well established as a technology for tracking charged particles, especially when low material budget is desirable. For such applicati…

physics.ins-det2012★ 2 cited

Infrastructure for Detector Research and Development towards the International Linear Collider

J. Aguilar, P. Ambalathankandy, T. Fiutowski +274

The EUDET-project was launched to create an infrastructure for developing and testing new and advanced detector technologies to be used at a future linear collider. The aim was to…

physics.ins-det2009

Silicon Tracking DAQ

Aurore Savoy-Navarro, Alex Charpy, Catalin Ciobanu +9

Some preliminary thoughts on how to design and develop the DAQ architecture for the Silicon tracking system at the future Linear electron positron collider, are briefly presented h…

physics.ins-det2009

A new 130nm F.E readout chip for microstrip detectors

Aurore Savoy-Navarro, Jean F. Genat, Th. Hung Pham +3

In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly compact mixed-signal chip has been designed in 130nm CMOS technology intended to rea…