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20222026
most citedHardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA

3 citations · 3 across the 4 of their papers we have counts for

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cs.LG2025★ 3 cited

Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA

Hiroshi Nakano, Krzysztof Blachut, Kamil Jeziorek +6

As the quantities of data recorded by embedded edge sensors grow, so too does the need for intelligent local processing. Such data often comes in the form of time-series signals, b…