2 papers
cs.AR2026
Enabling RISC-V Vector Code Generation in MLIR through Custom xDSL Lowerings
Jie Lei, Héctor Martínez, Adrián Castelló
The growing adoption of RISC-V in high-performance and scientific computing has increased the need for performance-portable code targeting the RISC-V Vector (RVV) extension. Howeve…
cs.DC2024
Mapping Parallel Matrix Multiplication in GotoBLAS2 to the AMD Versal ACAP for Deep Learning
Jie Lei, Enrique S. Quintana-Ortí
This paper investigates the design of parallel general matrix multiplication (GEMM) for a Versal Adaptive Compute Accelerated Platform (ACAP) equipped with a VC1902 system-on-chip…