V. Prasad

collaborators

2 papers

hep-ex2026

Observation of $D_{s}^{+} \to a_{0} (980)^{+} f_{0} (500)$ in the Amplitude Analysis of $D_{s}^{+} \to π^{+} π^{0} π^{0} η$

BESIII Collaboration, M. Ablikim, M. N. Achasov +716

We report the first observation of the decay $D_{s}^{+} \to π^{+} π^{0} π^{0} η$ in a data set corresponding to an integrated luminosity of 7.33 fb $^{- 1}$ , collected in $e^{+} e^{-}$ collisions by t…

cs.AR2024

Python-based DSL for generating Verilog model of Synchronous Digital Circuits

Mandar Datar, Dhruva S. Hegde, Vendra Durga Prasad +8

We have designed a Python-based Domain Specific Language (DSL) for modeling synchronous digital circuits. In this DSL, hardware is modeled as a collection of transactions -- runnin…

Observation of Ds+​→a0​(980)+f0​(500) in the Amplitude Analysis of Ds+​→π+π0π0η

Python-based DSL for generating Verilog model of Synchronous Digital Circuits

Observation of $D_{s}^{+} \to a_{0} (980)^{+} f_{0} (500)$ in the Amplitude Analysis of $D_{s}^{+} \to π^{+} π^{0} π^{0} η$