4 papers · 1 filter
Porting and Benchmarking Chapel on Emerging RISC-V Hardware: an HPC Viability Study
Ian Henriksen, Chris Taylor, Patrick Diehl +4
The Chapel programming language recently added support for the RISC-V architecture. Here we discuss what changes were needed for Chapel to work on RISC-V as well as lessons learned…
Is RISC-V Ready for Machine Learning? Portable Gaussian Processes Using Asynchronous Tasks
Alexander Strack, Patrick Diehl, Dirk Pflüger
Gaussian processes are widely used in machine learning domains but remain computationally demanding, limiting their efficient scalability across emerging hardware platforms. The GP…
LAAFD: LLM-based Agents for Accelerated FPGA Design
Maxim Moraru, Kamalavasan Kamalakkannan, Jered Dominguez-Trujillo +6
FPGAs offer high performance, low latency, and energy efficiency for accelerated computing, yet adoption in scientific and edge settings is limited by the specialized hardware expe…
Bridging Simulation and Silicon: A Study of RISC-V Hardware and FireSim Simulation
Atanu Barai, Kamalavasan Kamalakkannan, Patrick Diehl +6
RISC-V ISA-based processors have recently emerged as both powerful and energy-efficient computing platforms. The release of the MILK-V Pioneer marked a significant milestone as the…