2 papers
cs.DC2026
Monte Cimone v3: Where RISC-V Stands in High-Performance Computing
Emanuele Venieri, Simone Manoni, Giacomo Madella +4
The Monte Cimone project provides a RISC-V testbed for High-Performacne Computing cluster. This paper presents Monte Cimone v3 (MCv3), the third iteration of the Monte Cimone RISC-…
cs.DC2025
Monte Cimone v2: Down the Road of RISC-V High-Performance Computers
Emanuele Venieri, Simone Manoni, Gabriele Ceccolini +6
Many RISC-V (RV) platforms and SoCs have been announced in recent years targeting the HPC sector, but only a few of them are commercially available and engineered to fit the HPC re…