1 citations · 1 across the 3 of their papers we have counts for
4 papers
TPCS: A Cycle-Level Simulation Paradigm with Native Execution Semantics for RTL Modeling and Generation
Chengzhen Meng, Xiaoyu Li, Chen Bai +2
The growing diversity of domain-specific architectures and microarchitectural designs demands fast and accurate evaluation methods during early design stages. However, existing app…
CPPL: A Circuit Prompt Programming Language
Shuo Yin, Yihe Wang, Lancheng Zou +6
Large language models (LLMs) have shown promise in register-transfer level (RTL) design automation, but direct RTL generation remains difficult to validate, optimize, and integrate…
PipeRTL: Timing-Aware Pipeline Optimization at IR-Level for RTL Generation
Shuo Yin, Fangzhou Liu, Lancheng Zou +6
Modern hardware compilers increasingly rely on rich intermediate representations (IRs) to preserve optimization-relevant semantics before generating RTL code. However, one importan…
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration
Tong Qiao, Jianlei Yang, Yingjie Qi +5
Graph Neural Networks (GNNs) succeed significantly in many applications recently. However, balancing GNNs training runtime cost, memory consumption, and attainable accuracy for var…