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eess.SY2026
Wire-Level Interrupt-to-Decision Latency of On-Sensor MLC versus Host Inference on the NVIDIA Jetson Orin Nano: A Pre-Registered Measurement Study
Akul Swami, Dnyaneshwar Sonawane
The Machine Learning Core (MLC) embedded in the STMicroelectronics LSM6DSOX IMU is widely cited as a low-latency alternative to host-side inference, yet wire-level decision-deliver…
eess.SY2026
Architecture Dependent Temporal Observability Under Deployment Interference in Edge Inference Systems
Akul Swami, Nikhil Chougule
Edge inference systems are typically evaluated with software-reported latency collected under controlled conditions. We argue, and demonstrate empirically, that deployment interfer…
eess.SY2026
Per-Platform GPIO Overhead in Hardware-Validated Edge ML Inference Timing
Akul Swami, Nikhil Chougule
Edge machine learning (ML) deployments increasingly rely on per-inference timing measured by software clocks such as Python's perf_counter, but these measurements are not always va…