4 papers
Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning
Yi Liu, Hongji Zhang, Yiwen Wang +4
Estimating the quality of register transfer level (RTL) designs is crucial in the electronic design automation (EDA) workflow, as it enables instant feedback on key performance met…
MappingEvolve: LLM-Driven Code Evolution for Technology Mapping
Rongliang Fu, Yi Liu, Qiang Xu +1
Technology mapping is a critical yet challenging stage in logic synthesis. While Large Language Models (LLMs) have been applied to generate optimization scripts, their potential fo…
Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving
Zhengyuan Shi, Tiebing Tang, Jiaying Zhu +5
The Circuit Satisfiability (CSAT) problem, a variant of the Boolean Satisfiability (SAT) problem, plays a critical role in integrated circuit design and verification. However, exis…
Evaluating Text-to-Image Generative Models: An Empirical Study on Human Image Synthesis
Muxi Chen, Yi Liu, Jian Yi +5
In this paper, we present an empirical study introducing a nuanced evaluation framework for text-to-image (T2I) generative models, applied to human image synthesis. Our framework c…