collaborators

10 papers

cs.LG2026

UniRTL: Unifying Code and Graph for Robust RTL Representation Learning

Yi Liu, Hongji Zhang, Lei Chen +2

Developing effective representations for register transfer level (RTL) designs is crucial for accelerating the hardware design workflow. Existing approaches, however, typically rel…

cs.LG2026

Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning

Yi Liu, Hongji Zhang, Yiwen Wang +4

Estimating the quality of register transfer level (RTL) designs is crucial in the electronic design automation (EDA) workflow, as it enables instant feedback on key performance met…

cs.LG2026

Context Distillation as Latent Memory Management

Ziyang Zheng, Zeju Li, Xiangyu Wen +5

Context distillation compresses contextual information into model parameters, yet existing methods often ignore how multiple distilled latent memories should be stored, retrieved,…

cs.NE2026

Kernel Foundry: A Diagnosis-driven Evolutionary Kernel Optimizer with Multi-Experts

Zixuan Huang, Da Chen, Kecheng Huang +5

Generating high-performance GPU kernels remains challenging due to the need for both correctness and hardware-aware optimization. While large language models (LLMs) show promise in…

cs.AR2025

SmaRTLy: RTL Optimization with Logic Inferencing and Structural Rebuilding

Chengxi Li, Yang Sun, Lei Chen +3

This paper proposes smaRTLy: a new optimization technique for multiplexers in Register-Transfer Level (RTL) logic synthesis. Multiplexer trees are very common in RTL designs, and t…

cs.CL2025

LoopServe: An Adaptive Dual-phase LLM Inference Acceleration System for Multi-Turn Dialogues

Haoyang Li, Zhanchao Xu, Yiming Li +9

Multi-turn dialogues are essential in many real-world applications of large language models, such as chatbots and virtual assistants. As conversation histories become longer, exist…