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cs.AR2026
MixFP4: Enhancing NVFP4 with Adaptive FP4/INT4 Block Representations
Jiaxiang Zou, Yonghao Chen, Ruilong Wu +1
As large language models continue to scale, fine-grained block-scaled low-precision formats such as NVFP4 are increasingly adopted for their substantial throughput and memory benef…
cs.AR2024
Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation
Xinmiao Zhang, Zheng Feng, Shengwen Liang +4
FPGA-based graph processing accelerators, enabling extensive customization, have demonstrated significant energy efficiency over general computing engines like CPUs and GPUs. Nonet…