2 citations · 2 across the 2 of their papers we have counts for
2 papers
eess.SY2024
Optimized Cryo-CMOS Technology with VTH<0.2V and Ion>1.2mA/um for High-Peformance Computing
Chang He, Yue Xin, Longfei Yang +13
We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment…
eess.SY2022★ 2 cited
Generic Cryo-CMOS Device Modeling and EDACompatible Platform for Reliable Cryogenic IC Design
Zhidong Tang, Zewei Wang, Yumeng Yuan +15
This paper outlines the establishment of a generic cryogenic CMOS database in which key electrical parameters and transfer characteristics of the MOSFETs are quantified as function…