294 citations · 338 across the 6 of their papers we have counts for
6 papers
The Inherent Adversarial Robustness of Analog In-Memory Computing
Corey Lammie, Julian Büchel, Athanasios Vasilopoulos +2
A key challenge for Deep Neural Network (DNN) algorithms is their vulnerability to adversarial attacks. Inherently non-deterministic compute substrates, such as those based on Anal…
Kernel Approximation using Analog In-Memory Computing
Julian Büchel, Giacomo Camposampiero, Athanasios Vasilopoulos +4
Kernel functions are vital ingredients of several machine learning algorithms, but often incur significant memory and computational costs. We introduce an approach to kernel approx…
A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing
Elena Ferro, Athanasios Vasilopoulos, Corey Lammie +4
Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference. However, a certain amount of digital post-processing is requ…
Improving the Accuracy of Analog-Based In-Memory Computing Accelerators Post-Training
Corey Lammie, Athanasios Vasilopoulos, Julian Büchel +4
Analog-Based In-Memory Computing (AIMC) inference accelerators can be used to efficiently execute Deep Neural Network (DNN) inference workloads. However, to mitigate accuracy losse…
Gradient descent-based programming of analog in-memory computing cores
Julian Büchel, Athanasios Vasilopoulos, Benedikt Kersting +11
The precise programming of crossbar arrays of unit-cells is crucial for obtaining high matrix-vector-multiplication (MVM) accuracy in analog in-memory computing (AIMC) cores. We pr…
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference
Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic +26
The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of…