7 papers
A Process-Aware Hybrid Si/IGO Monolithic-3D 6T SRAM with BEOL Pass-Gates for the 2nm Node
Po-Chuan Wang, Dongwon Jang, Eknath Sarkar +5
We propose a monolithic-3D (M3D) 6T SRAM at the 2nm node, integrating BEOL IGO pass-gates (PGs) with an all-silicon nanosheet latch, buried power rails (BPRs), and Ru interconnects…
ACRONYM: Accelerated Approximate Nearest Neighbor Search in Memory for Dynamic Vector Databases
Md Mizanur Rahaman Nayan, Tianqi Zhang, Flavio Ponzina +2
Vector database search with frequent updates is increasingly critical in applications such as retrieval augmented generation, recommendation systems, and large-scale embedding retr…
Modeling and Optimization of Two-Terminal Spin-Orbit-Torque MRAM
Md Nahid Haque Shazon, Piyush Kumar, Luqiao Liu +2
This paper presents physical modeling and benchmarking for two-terminal spin-orbit torque magnetic random-access memory (2T-SOT-MRAM). The results indicate that the common SOT mate…
HERP: Hardware for Energy Efficient and Realtime DB Search and Cluster Expansion in Proteomics
Md Mizanur Rahaman Nayan, Zheyu Li, Flavio Ponzina +3
Database search and clustering are fundamental components of many data analytics problems, such as mass spectrometry-driven proteomics. Traditional full clustering and search algor…
Content Addressable Memory Design with Reference Resistor for Improved Search Resolution
Siri Narla, Steven J. Koester, Rebecca A. Dawley +3
Despite the parallel in-memory search capabilities of content addressable memories (CAMs), their use in applications is constrained by their limited resolution that worsens as they…
HyDra: SOT-CAM Based Vector Symbolic Macro for Hyperdimensional Computing
Md Mizanur Rahaman Nayan, Che-Kai Liu, Zishen Wan +2
Hyperdimensional computing (HDC) is a brain-inspired paradigm valued for its noise robustness, parallelism, energy efficiency, and low computational overhead. Hardware accelerators…