2 papers
cs.AR2026
Compiler and Hardware Co-Design for Accelerator Architectures
Karl Herman Krause, Emad Jacob Maroun, Martin Schoeberl
Heterogeneous accelerator architectures offer an efficient path to performance for compute-intensive workloads. However, full-stack integration remains difficult. We present EAAC (…
cs.AR2025
Wildcat: Educational RISC-V Microprocessors
Martin Schoeberl
In computer architecture courses, we usually teach RISC processors using a five-stage pipeline, neglecting alternative organizations. This design choice, rooted in the 1980s techno…