activity
20222026
most citedASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory

2 citations · 5 across the 5 of their papers we have counts for

collaborators

6 papers

cs.RO2026

C2Flight: A Closed-Loop Co-Simulation Framework for Early-Stage Evaluation of Heterogeneous UAV Computing Systems

Xizhu Chen, Shuyuan Zhang, Yixuan Li +4

Early-stage design of heterogeneous UAV computing systems requires evaluating how algorithm, hardware, communication, and system topology affect closed-loop flight before the compl…

cs.DC2025

Enhancing Memory Efficiency in Large Language Model Training Through Chronos-aware Pipeline Parallelism

Xinyuan Lin, Chenlu Li, Zongle Huang +5

Larger model sizes and longer sequence lengths have empowered the Large Language Model (LLM) to achieve outstanding performance across various domains. However, this progress bring…

cs.AR2023★ 2 cited

ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory

Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu +8

Genome sequence analysis is a powerful tool in medical and scientific research. Considering the inevitable sequencing errors and genetic variations, approximate string matching (AS…

cs.ET2022★ 1 cited

Eliminating Leakage in Volatile Memory with Anti-Ferroelectric Transistors

Hongtao Zhong, Zijie Zheng, Leming Jiao +8

Cache serves as a temporary data memory module in many general-purpose processors and domain-specific accelerators. Its density, power, speed, and reliability play a critical role…

cs.AR2022★ 1 cited

A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface

Guodong Yin, Mufeng Zhou, Yiming Chen +9

Performing data-intensive tasks in the von Neumann architecture is challenging to achieve both high performance and power efficiency due to the memory wall bottleneck. Computing-in…

cs.AR2022★ 1 cited

ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key

Jianfeng Wang, Zhonghao Chen, Jiahao Zhang +9

Intellectual property (IP) piracy has become a non-negligible problem as the integrated circuit (IC) production supply chain is becoming increasingly globalized and separated that…