5 papers
TREA: Low-precision Time-Multiplexed, Resource-Efficient Edge Accelerator for Object Detection and Classification
Vijay Pratap Sharma, Mukul Lokhande, Ratko Pilipovic +2
This work presents TREA, a low-precision time-multiplexed and resource-efficient edge-AI accelerator for object detection and classification, targeting stringent area-power-latency…
EULER-ADAS: Energy-Efficient & SIMD-Unified Logarithmic-Posit Engine for Precision-Reconfigurable Approximate ADAS Acceleration
Mukul Lokhande, Ratko Pilipovic, Omkar Kokane +2
Advanced driver-assistance systems (ADAS) require neural compute engines that deliver low-latency inference under strict power and area constraints. Posit arithmetic is attractive…
Retrospective: A CORDIC Based Configurable Activation Function for NN Applications
Omkar Kokane, Gopal Raut, Salim Ullah +4
A CORDIC-based configuration for the design of Activation Functions (AF) was previously suggested to accelerate ASIC hardware design for resource-constrained systems by providing f…
CORDIC Is All You Need
Omkar Kokane, Adam Teman, Anushka Jha +6
Artificial intelligence necessitates adaptable hardware accelerators for efficient high-throughput million operations. We present pipelined architecture with CORDIC block for linea…
HOAA: Hybrid Overestimating Approximate Adder for Enhanced Performance Processing Engine
Omkar Kokane, Prabhat Sati, Mukul Lokhande +1
This paper presents the Hybrid Overestimating Approximate Adder designed to enhance the performance in processing engines, specifically focused on edge AI applications. A novel Plu…