most citedFlex-TPU: A Flexible TPU with Runtime Reconfigurable Dataflow Architecture

3 citations · 5 across the 5 of their papers we have counts for

collaborators

5 papers

cs.AR2025

PIM-LLM: A High-Throughput Hybrid PIM Architecture for 1-bit LLMs

Jinendra Malekar, Peyton Chandarana, Md Hasibul Amin +2

In this paper, we propose PIM-LLM, a hybrid architecture developed to accelerate 1-bit large language models (LLMs). PIM-LLM leverages analog processing-in-memory (PIM) architectur…

cs.AR2025

TPU-Gen: LLM-Driven Custom Tensor Processing Unit Generator

Deepak Vungarala, Mohammed E. Elbtity, Sumiya Syed +5

The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computationa…

cs.AR2025★ 1 cited

Learnable Sparsification of Die-to-Die Communication via Spike-Based Encoding

Joshua Nardone, Ruijie Zhu, Joseph Callenes +3

Efficient communication is central to both biological and artificial intelligence (AI) systems. In biological brains, the challenge of long-range communication across regions is ad…

cs.AI2024★ 1 cited

Matmul or No Matmul in the Era of 1-bit LLMs

Jinendra Malekar, Mohammed E. Elbtity, Ramtin Zand

The advent of 1-bit large language models (LLMs) has attracted considerable attention and opened up new research opportunities. However, 1-bit LLMs only improve a fraction of model…

cs.AR2024★ 3 cited

Flex-TPU: A Flexible TPU with Runtime Reconfigurable Dataflow Architecture

Mohammed Elbtity, Peyton Chandarana, Ramtin Zand

Tensor processing units (TPUs) are one of the most well-known machine learning (ML) accelerators utilized at large scale in data centers as well as in tiny ML applications. TPUs of…