5 citations · 5 across the 2 of their papers we have counts for
4 papers
High Speed Network Processing for Scientific Computing in the Open Cloud Testbed
Miriam Leeser, Michael Zink, Suranga Handagala +3
This paper presents an FPGA-based SmartNIC architecture designed to address critical network challenges in data-intensive scientific computing. As scientific workflows increasingly…
LatencyLab: A DPDK-Based P4 Pipeline Latency Measurement Framework for FPGA SmartNICs
Pavani Kuppili, Zhaoyang Han, Yicheng Qian +4
P4-programmable FPGA SmartNICs place packet processing directly on the wire, but open FPGA P4 toolflows do not expose timestamping at the pipeline boundary, so the latency a P4 pro…
Memory-efficient Sketch Acceleration for Handling Large Network Flows on FPGAs
Zhaoyang Han, Yicheng Qian, Michael Zink +1
Sketch-based algorithms for network traffic monitoring have drawn increasing interest in recent years due to their sub-linear memory efficiency and high accuracy. As the volume of…
Extracting TCPIP Headers at High Speed for the Anonymized Network Traffic Graph Challenge
Zhaoyang Han, Andrew Briasco-Stewart, Michael Zink +1
Field Programmable Gate Arrays (FPGAs) play a significant role in computationally intensive network processing due to their flexibility and efficiency. Particularly with the high-l…