2 papers
cs.AR2026
VeriHGN: Heterogeneous Graph-Based Congestion Prediction for Chip Layout Verification
Runbang Hu, Bo Fang, Bingzhe Li +1
As Very Large Scale Integration (VLSI) designs continue to scale in size and complexity, layout verification has become a central challenge in modern Electronic Design Automation (…
cs.CL2025
HuggingGraph: Understanding the Supply Chain of LLM Ecosystem
Mohammad Shahedur Rahman, Peng Gao, Yuede Ji
Large language models (LLMs) leverage deep learning architectures to process and predict sequences of words, enabling them to perform a wide range of natural language processing ta…