1 citations · 1 across the 9 of their papers we have counts for
9 papers
Hardware-efficient neural networks for FPGA-based radio triggering of extensive air showers
Vesselin Dimitrov, Alperen Aksoy, Ilja Bekman +7
We present a hardware-efficient hybrid trigger for FPGA-based radio detection of extensive air showers. The hybrid design consists of a lightweight denoiser that cleans raw ADC tra…
OTTER - Two Transistor - One RRAM Architecture for Reliable In-Memory-Computing in 28 nm CMOS Technology
Yang Chen, Daniele Storelli, Xinyi Zhao +20
This work presents OTTER, a 28 nm CMOS platform co-integrated with TaOx-based valence-change mechanism (VCM) RRAM, demonstrating a two-transistor-one-memristive-device (2T1R) archi…
A dual-polarization whitened-template trigger for real-time radio detection of extensive air showers
Qader Dorosti, Alperen Aksoy, Ilja Bekman +7
Autonomous radio stations require a first-stage trigger that rejects measured background while preserving weak extensive-air-shower pulses under tight hardware constraints. We pres…
Quantization Effects of Artificial Neural Networks for Embedded Edge-Computing Applications
Alperen Aksoy, Ilja Bekman, Vesselin Dimitrov +6
This paper examines the use of Quantized Neural Networks (QNNs) for two resource-constrained scientific applications: automated calibration of semiconductor quantum bits (qubits) a…
2T1R Regulated Memristor Conductance Control Array Architecture for Neuromorphic Computing using 28nm CMOS Technology
Neethu Kuriakose, Arun Ashok, Christian Grewing +2
Memristors are promising devices for scalable and low power, in-memory computing to improve the energy efficiency of a rising computational demand. The crossbar array architecture…
Concept of a System-on-Chip Research Platform Benchmarking Interaction of Memristor-based Bio-inspired Computing Paradigms
Christian Grewing, Arun Ashok, Sabitha Kusuma +3
A system architecture is suggested for a System on Chip that will combine several different memristor-based, bio-inspired computation arrays with inter- and intra-chip communicatio…
Self Clocked Digital LDO for Cryogenic Power Management in 22nm FDSOI with 98 Percent Efficiency
A. Ashok, A. Cabrera, S. Baje +4
A universal quantum computer~(QC), though promising ground breaking solutions to complex problems, still faces several challenges with respect to scalability. Current state-of-the-…
Design Space Exploration for Particle Detector Read-out Implementations in Matlab and Simulink on the Example of the SHiP SBT
Florian Rössing, David Arutinov, Alessia Brignoli +6
On a very fundamental level, particle detectors share similar requirements for their read-out chain. This is reflected in the way that typical read-out solutions are developed, whe…
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha +10
Memristor-aided logic (MAGIC) design style holds a high promise for realizing digital logic-in-memory functionality. The ability to implement a specific gate in a MAGIC design styl…