most citedScalable 28nm IC implementation of coupled oscillator network featuring tunable topology and complexity

1 citations · 1 across the 5 of their papers we have counts for

collaborators

5 papers

cs.ET2026

OTTER - Two Transistor - One RRAM Architecture for Reliable In-Memory-Computing in 28 nm CMOS Technology

Yang Chen, Daniele Storelli, Xinyi Zhao +20

This work presents OTTER, a 28 nm CMOS platform co-integrated with TaOx-based valence-change mechanism (VCM) RRAM, demonstrating a two-transistor-one-memristive-device (2T1R) archi…

cs.ET2025

2T1R Regulated Memristor Conductance Control Array Architecture for Neuromorphic Computing using 28nm CMOS Technology

Neethu Kuriakose, Arun Ashok, Christian Grewing +2

Memristors are promising devices for scalable and low power, in-memory computing to improve the energy efficiency of a rising computational demand. The crossbar array architecture…

cs.ET2025

Concept of a System-on-Chip Research Platform Benchmarking Interaction of Memristor-based Bio-inspired Computing Paradigms

Christian Grewing, Arun Ashok, Sabitha Kusuma +3

A system architecture is suggested for a System on Chip that will combine several different memristor-based, bio-inspired computation arrays with inter- and intra-chip communicatio…

cs.ET2025★ 1 cited

Scalable 28nm IC implementation of coupled oscillator network featuring tunable topology and complexity

S. Y. Neyaz, A. Ashok, M. Schiek +3

Integrated circuit implementations of coupled oscillator networks have recently gained increased attention. The focus is usually on using these networks for analogue computing, for…

quant-ph2025

Self Clocked Digital LDO for Cryogenic Power Management in 22nm FDSOI with 98 Percent Efficiency

A. Ashok, A. Cabrera, S. Baje +4

A universal quantum computer~(QC), though promising ground breaking solutions to complex problems, still faces several challenges with respect to scalability. Current state-of-the-…