131 citations · 131 across the 2 of their papers we have counts for
3 papers
cs.DC2026
TRANSIT: Transparent Scale-in for Multi-Node LLM Training
Hyungyo Kim, Nicholas Satchanov, Hrishi Shah +9
TRANSIT is a transparent scale-in framework to enable multi-node model training on fewer GPUs while maintaining training efficiency by transparently leveraging CPU DRAM as an exten…
cs.AR2025
A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices
Haneul Park, Jiaqi Lou, Sangjin Lee +5
In modern server CPUs, the Last-Level Cache (LLC) serves not only as a victim cache for higher-level private caches but also as a buffer for low-latency DMA transfers between CPU c…
cs.PF2023★ 131 cited
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices
Yan Sun, Yifan Yuan, Zeduo Yu +11
The ever-growing demands for memory with larger capacity and higher bandwidth have driven recent innovations on memory expansion and disaggregation technologies based on Compute eX…