5 papers
MailoHLS: Multi-Adapter Structure-Aware Learning for Pareto-Driven HLS Pragma Optimization
Elena Vouvali, Dimosthenis Masouros, Aggelos Ferikoglou +2
High-Level Synthesis (HLS) enables rapid development of FPGA accelerators, yet achieving high-quality results (QoR) remains challenging due to the large and irregular design space…
MaRVIn: A Cross-Layer Mixed-Precision RISC-V Framework for DNN Inference, from ISA Extension to Hardware Acceleration
Giorgos Armeniakos, Alexis Maras, Sotirios Xydis +1
The evolution of quantization and mixed-precision techniques has unlocked new possibilities for enhancing the speed and energy efficiency of NNs. Several recent studies indicate th…
A Unified Framework for Mapping and Synthesis of Approximate R-Blocks CGRAs
Georgios Alexandris, Panagiotis Chaidos, Alexis Maras +5
The ever-increasing complexity and operational diversity of modern Neural Networks (NNs) have caused the need for low-power and, at the same time, high-performance edge devices for…
Futureproof Static Memory Planning
Christos Lamprakos, Panagiotis Xanthopoulos, Manolis Katsaragakis +3
The NP-complete combinatorial optimization task of assigning offsets to a set of buffers with known sizes and lifetimes so as to minimize total memory usage is called dynamic stora…
A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications
Panagiotis Chaidos, Giorgos Armeniakos, Sotirios Xydis +1
Printed electronics have gained significant traction in recent years, presenting a viable path to integrating computing into everyday items, from disposable products to low-cost he…