92 citations · 92 across the 7 of their papers we have counts for
3 papers · 1 filter
VeriChat: An Agentic Conversational AI Assistant for Hardware Security Verification
Dipayan Saha, Khan Thamid Hasan, Shams Tarek +3
Hardware security verification is a multi-stage process in which engineers must navigate complex design analyses, threat considerations, and verification strategies. They often nee…
Assertain: Automated Security Assertion Generation Using Large Language Models
Shams Tarek, Dipayan Saha, Khan Thamid Hasan +3
The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property…
LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification
Md Ajoad Hasan, Dipayan Saha, Khan Thamid Hasan +5
The growing complexity of modern system-on-chip (SoC) and IP designs is making security assurance difficult day by day. One of the fundamental steps in the pre-silicon security ver…