activity
20242026
collaborators

5 papers

cs.AR2026

SPECTRA: Adaptive Execution of Speculative Decoding on a Runtime-Reconfigurable Tiled Architecture

Gabriele Tombesi, William Baisi, Je Yang +5

LLM inference on edge devices is constrained by computational and memory resources, making efficient autoregressive decoding challenging. Speculative decoding alleviates this bottl…

cs.AR2026

NoTB: Oracle-Free Triage of LLM-Generated RTL via Cross-Model Formal Consensus

Elisavet Lydia Alvanaki, Je Yang, Biruk Seyoum +1

Large language models (LLMs) are increasingly used to generate register-transfer-level (RTL) designs from natural-language specifications. However, assessing functional correctness…

cs.AR2026

HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip

Pei-Huan Tsai, Kuan-Lin Chiu, William Baisi +2

Large language models (LLMs) are adopted for software and hardware design, yet these domains are still evaluated separately. Software benchmarks typically assume fixed hardware tar…

cs.AR2025

SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

Elisavet Lydia Alvanaki, Kevin Lee, Luca P. Carloni

Over the last few years, Large Language Models (LLMs) have emerged as a valuable tool for Electronic Design Automation (EDA). State-of-the-art research in LLM-aided design has demo…

cs.AR2024

Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures

Joseph Zuckerman, John-David Wellman, Ajay Vanamali +8

We present several enhancements to the open-source ESP platform to support flexible and efficient on-chip communication for programmable accelerators in heterogeneous SoCs. These e…