4 papers
Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks
Kshitij Raj, Atri Chatterjee, Patanjali SLPSK +2
Designing secure architectures for system-on-chip (SoC) platforms is a highly intricate and time-intensive task, often requiring months of development and meticulous verification.…
Secure and Storage-Efficient Deep Learning Models for Edge AI Using Automatic Weight Generation
Habibur Rahaman, Atri Chatterjee, Swarup Bhunia
Complex neural networks require substantial memory to store a large number of synaptic weights. This work introduces WINGs (Automatic Weight Generator for Secure and Storage-Effici…
Enhancing Test Efficiency through Automated ATPG-Aware Lightweight Scan Instrumentation
Sudipta Paria, Md Rezoan Ferdous, Aritra Dasgupta +2
Scan-based Design-for-Testability (DFT) measures are prevalent in modern digital integrated circuits to achieve high test quality at low hardware cost. With the advent of 3D hetero…
Runtime Detection of Adversarial Attacks in AI Accelerators Using Performance Counters
Habibur Rahaman, Atri Chatterjee, Swarup Bhunia
Rapid adoption of AI technologies raises several major security concerns, including the risks of adversarial perturbations, which threaten the confidentiality and integrity of AI a…