66 citations · 77 across the 7 of their papers we have counts for
8 papers
ROSUM-MCTS: Monte Carlo Tree Search-Inspired HDL Code Summarization with Structural Rewards
Prashanth Vijayaraghavan, Charles Mackin, Luyao Shi +6
Large language models (LLMs) have shown promise in code summarization, yet their effectiveness for Hardware Description Languages (HDLs) like VHDL and Verilog remains underexplored…
SYMDIREC: A Neuro-Symbolic Divide-Retrieve-Conquer Framework for Enhanced RTL Synthesis and Summarization
Prashanth Vijayaraghavan, Apoorva Nitsure, Luyao Shi +5
Register-Transfer Level (RTL) synthesis and summarization are central to hardware design automation but remain challenging for Large Language Models (LLMs) due to rigid HDL syntax,…
CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimization
Che-Ming Chang, Prashanth Vijayaraghavan, Ashutosh Jadhav +4
Optimizing Register Transfer Level (RTL) code is a critical step in Electronic Design Automation (EDA) for improving power, performance, and area (PPA). We present CODMAS (Collabor…
Chain-of-Descriptions: Improving Code LLMs for VHDL Code Generation and Summarization
Prashanth Vijayaraghavan, Apoorva Nitsure, Charles Mackin +9
Large Language Models (LLMs) have become widely used across diverse NLP tasks and domains, demonstrating their adaptability and effectiveness. In the realm of Electronic Design Aut…
Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing
J. Luquin, C. Mackin, S. Ambrogio +11
Analog In-Memory Compute (AIMC) can improve the energy efficiency of Deep Learning by orders of magnitude. Yet analog-domain device and circuit non-idealities -- within the analog…
VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generation
Prashanth Vijayaraghavan, Luyao Shi, Stefano Ambrogio +4
With the unprecedented advancements in Large Language Models (LLMs), their application domains have expanded to include code generation tasks across various programming languages.…
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
Manuel Le Gallo, Corey Lammie, Julian Buechel +8
Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and n…
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators
Malte J. Rasch, Charles Mackin, Manuel Le Gallo +10
Analog in-memory computing (AIMC) -- a promising approach for energy-efficient acceleration of deep learning workloads -- computes matrix-vector multiplications (MVMs) but only app…