5 papers
Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
Shibing Mo, Jing Liu, Jianchu Xu +1
Macro placement is a fundamental step in modern chip physical design, playing a crucial role in determining the solution quality of high-dimensional combinatorial optimization prob…
Low-Latency FPGA Control System for Real-Time Neural Network Processing in CCD-Based Trapped-Ion Qubit Measurement
Binglei Lou, Gautham Duddi Krishnaswaroop, Filip Wojcicki +5
Accurate and low-latency qubit state measurement is critical for trapped-ion quantum computing. While deep neural networks (DNNs) have been integrated to enhance detection fidelity…
Enhancing LUT-based Deep Neural Networks Inference through Architecture and Connectivity Optimization
Binglei Lou, Ruilin Wu, Philip Leong
Deploying deep neural networks (DNNs) on resource-constrained edge devices such as FPGAs requires a careful balance among latency, power, and hardware resource usage, while maintai…
AMD Versal Implementations of FAM and SSCA Estimators
Carol Jingyi Li, Ruilin Wu, Philip H. W. Leong
Cyclostationary analysis is widely used in signal processing, particularly in the analysis of human-made signals, and spectral correlation density (SCD) is often used to characteri…
SparseLUT: Sparse Connectivity Optimization for Lookup Table-based Deep Neural Networks
Binglei Lou, Ruilin Wu, Philip Leong
The deployment of deep neural networks (DNNs) on resource-constrained edge devices such as field-programmable gate arrays (FPGAs) requires a careful balance of latency, power, and…