2 citations · 2 across the 4 of their papers we have counts for
4 papers
A Novel Mutation Based Method for Detecting FPGA Logic Synthesis Tool Bugs
Yi Zhang, He Jiang, Xiaochen Li +3
FPGA (Field-Programmable Gate Array) logic synthesis tools are key components in the EDA (Electronic Design Automation) toolchain. They convert hardware designs written in descript…
A Novel Interactive-Guided Differential Testing Approach for FPGA Simulation Debugger Tools
Shikai Guo, Xiaoyu Wang, Xiaochen Li +2
Field-Programmable Gate Array (FPGA) development tool chains are widely used in FPGA design, simulation, and verification in critical areas like communications, automotive electron…
A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers
Zhihao Xu, Shikai Guo, Guilin Zhao +3
Field Programmable Gate Array (FPGA) logic synthesis compilers (e.g., Vivado, Iverilog, Yosys, and Quartus) are widely applied in Electronic Design Automation (EDA), such as the de…
Learning-Based Relaxation of Completeness Requirements for Data Entry Forms
Hichem Belgacem, Xiaochen Li, Domenico Bianculli +1
Data entry forms use completeness requirements to specify the fields that are required or optional to fill for collecting necessary information from different types of users. Howev…