3 citations · 3 across the 5 of their papers we have counts for
5 papers
HePGA: A Heterogeneous Processing-in-Memory based GNN Training Accelerator
Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar +3
Processing-In-Memory (PIM) architectures offer a promising approach to accelerate Graph Neural Network (GNN) training and inference. However, various PIM devices such as ReRAM, FeF…
LATENT: LLM-Augmented Trojan Insertion and Evaluation Framework for Analog Netlist Topologies
Jayeeta Chaudhuri, Arjun Chaudhuri, Krishnendu Chakrabarty
Analog and mixed-signal (A/MS) integrated circuits (ICs) are integral to safety-critical applications. However, the globalization and outsourcing of A/MS ICs to untrusted third-par…
STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
Varun Darshana Parekh, Zachary Wyatt Hazenstab, Srivatsa Rangachar Srinivasa +3
Chiplet-based architectures and advanced packaging has emerged as transformative approaches in semiconductor design. While conventional physical design for 2.5D heterogeneous syste…
Large Language Models and Attention-Based AI for Hardware Design and Security: Progress, Challenges, and Opportunities
Sujan Ghimire, Parsa Mirfasihi, Muhtasim Alam Chowdhury +9
Recent advances in attention-based artificial intelligence (AI) models have unlocked vast potential to automate digital hardware design while enhancing and strengthening security m…
Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-based DNN Accelerators
Xueying Wu, Edward Hanson, Nansu Wang +9
Resistive random access memory (ReRAM)-based processing-in-memory (PIM) architectures have demonstrated great potential to accelerate Deep Neural Network (DNN) training/inference.…