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cs.AR2024
Look-Up Table based Neural Network Hardware
Ovishake Sen, Chukwufumnanya Ogbogu, Peyman Dehghanzadeh +4
Traditional digital implementations of neural accelerators are limited by high power and area overheads, while analog and non-CMOS implementations suffer from noise, device mismatc…
cs.AR2024★ 2 cited
FARe: Fault-Aware GNN Training on ReRAM-based PIM Accelerators
Pratyush Dhingra, Chukwufumnanya Ogbogu, Biresh Kumar Joardar +3
Resistive random-access memory (ReRAM)-based processing-in-memory (PIM) architecture is an attractive solution for training Graph Neural Networks (GNNs) on edge platforms. However,…