28 citations · 32 across the 8 of their papers we have counts for
9 papers
FRESHPart: Feedback-Reshaped Spectral Embedding for Hypergraph Partitioning
Rongjian Liang, Zhuo Feng, Brucek Khailany
With scalable Laplacian solvers now available, the next frontier is to exploit them more effectively for high-quality hypergraph partitioning. In this work, we revisit spectral hyp…
HySpecPro: Scalable Hypergraph Partitioning via Spectral Projection Optimization
Rongjian Liang, Zhuo Feng, Haoxing Ren
Modern VLSI designs comprise tens of billions of components, making scalable hypergraph partitioning critical for parallel and hierarchical optimization. Although multilevel partit…
Autonomous Code Evolution Meets NP-Completeness
Cunxi Yu, Rongjian Liang, Chia-Tung Ho +1
Large language models (LLMs) have recently shown strong coding abilities, enabling not only static code generation but also iterative code self-evolving through agentic frameworks.…
SchemaCoder: Automatic Log Schema Extraction Coder with Residual Q-Tree Boosting
Lily Jiaxin Wan, Chia-Tung Ho, Rongjian Liang +3
Log schema extraction is the process of deriving human-readable templates from massive volumes of log data, which is essential yet notoriously labor-intensive. Recent studies have…
HeuriGym: An Agentic Benchmark for LLM-Crafted Heuristics in Combinatorial Optimization
Hongzheng Chen, Yingheng Wang, Yaohui Cai +10
While Large Language Models (LLMs) have demonstrated significant advancements in reasoning and agent-based problem-solving, current evaluation methodologies fail to adequately asse…
Learning Library Cell Representations in Vector Space
Rongjian Liang, Yi-Chen Lu, Wen-Hao Liu +1
We propose Lib2Vec, a novel self-supervised framework to efficiently learn meaningful vector representations of library cells, enabling ML models to capture essential cell semantic…
Learning to Compare Hardware Designs for High-Level Synthesis
Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding +6
High-level synthesis (HLS) is an automated design process that transforms high-level code into hardware designs, enabling the rapid development of hardware accelerators. HLS relies…
GOALPlace: Begin with the End in Mind
Anthony Agnesina, Rongjian Liang, Geraldo Pradipta +2
Co-optimizing placement with congestion is integral to achieving high-quality designs. This paper presents GOALPlace, a new learning-based general approach to improving placement c…
ChipNeMo: Domain-Adapted LLMs for Chip Design
Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby +39
ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we…