2 papers
cs.CR2026
HOMARD: Hammering Off-chip Memory via Aggregate power Rail Disclosure
Eliott Quéré, Li-Chung Chiang, Carina Fiedler +6
Software-based microarchitectural attacks have mainly exploited timing differences to infer information from DRAM. However, defenses and optimizations can prevent timing-based appr…
cs.CR2025
Knock-Knock: Black-Box, Platform-Agnostic DRAM Address-Mapping Reverse Engineering
Antoine Plin, Lorenzo Casalino, Thomas Rokicki +1
Modern Systems-on-Chip (SoCs) employ undocumented linear address-scrambling functions to obfuscate DRAM addressing, which complicates DRAM-aware performance optimizations and hinde…