most citedOpenRTLSet: A Fully Open-Source Dataset for Large Language Model-based Verilog Module Design

1 citations · 1 across the 1 of their papers we have counts for

collaborators

2 papers

cs.CL2026★ 1 cited

OpenRTLSet: A Fully Open-Source Dataset for Large Language Model-based Verilog Module Design

Jinghua Wang, Lily Jiaxin Wan, Sanjana Pingali +6

OpenRTLSet introduces the largest fully open-source dataset for hardware design, offering over 131,000 diverse Verilog code samples to the research community and industry. Our data…

cs.AI2025

Proof2Silicon: Prompt Repair for Verified Code and Hardware Generation via Reinforcement Learning

Manvi Jha, Jiaxin Wan, Deming Chen

Large Language Models (LLMs) have demonstrated impressive capabilities in automated code generation but frequently produce code that fails formal verification, an essential require…