activity
20222026
most citedVerilogReader: LLM-Aided Hardware Test Generation

30 citations · 41 across the 8 of their papers we have counts for

collaborators

8 papers

cs.LG2026

Context Distillation as Latent Memory Management

Ziyang Zheng, Zeju Li, Xiangyu Wen +5

Context distillation compresses contextual information into model parameters, yet existing methods often ignore how multiple distilled latent memories should be stored, retrieved,…

cs.AR2026

FormalRTL: Verified RTL Synthesis at Scale

Kezhi Li, Min Li, Xiangyu Wen +4

Large language models (LLMs) have demonstrated significant potential in automating hardware synthesis, yet substantial barriers remain for industrial-scale, datapath-centric design…

cs.AI2025

Reasoning Scaffolding: Distilling the Flow of Thought from LLMs

Xiangyu Wen, Junhua Huang, Zeju Li +6

The prevailing approach to distilling reasoning from Large Language Models (LLMs)-behavioral cloning from textual rationales-is fundamentally limited. It teaches Small Language Mod…

cs.SE2024★ 30 cited

VerilogReader: LLM-Aided Hardware Test Generation

Ruiyang Ma, Yuxin Yang, Ziqian Liu +4

Test generation has been a critical and labor-intensive process in hardware design verification. Recently, the emergence of Large Language Model (LLM) with their advanced understan…

cs.AI2024★ 1 cited

IB-Net: Initial Branch Network for Variable Decision in Boolean Satisfiability

Tsz Ho Chan, Wenyi Xiao, Junhua Huang +3

Boolean Satisfiability problems are vital components in Electronic Design Automation, particularly within the Logic Equivalence Checking process. Currently, SAT solvers are employe…

cs.LG2023★ 3 cited

DeepGate2: Functionality-Aware Circuit Representation Learning

Zhengyuan Shi, Hongyang Pan, Sadaf Khan +7

Circuit representation learning aims to obtain neural representations of circuit elements and has emerged as a promising research direction that can be applied to various EDA and l…

cs.AI2023

Conflict-driven Structural Learning Towards Higher Coverage Rate in ATPG

Hui-Ling Zhen, Naixing Wang, Junhua Huang +3

Due to the increasing challenges posed by the relentless rise in the design complexity of integrated circuits, Boolean Satisfiability (SAT) has emerged as a robust alternative to s…

cs.AI2022★ 7 cited

SATformer: Transformer-Based UNSAT Core Learning

Zhengyuan Shi, Min Li, Yi Liu +5

This paper introduces SATformer, a novel Transformer-based approach for the Boolean Satisfiability (SAT) problem. Rather than solving the problem directly, SATformer approaches the…