9 citations · 11 across the 3 of their papers we have counts for
3 papers
CMOS 2.0 -- Redefining the Future of Scaling
Moritz Brunion, Navaneeth Kunhi Purayil, Francesco Dell'Atti +5
We propose to revisit the functional scaling paradigm by capitalizing on two recent developments in advanced chip manufacturing, namely 3D wafer bonding and backside processing. Th…
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes
Lorenzo Ruotolo, Lara Orlandic, Pengbo Yu +8
This paper presents the physical design exploration of a domain-specific processor (DSIP) architecture targeted at machine learning (ML), addressing the challenges of interconnect…
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration
Matheus Cavalcante, Anthony Agnesina, Samuel Riedel +6
Three-dimensional integrated circuits promise power, performance, and footprint gains compared to their 2D counterparts, thanks to drastic reductions in the interconnects' length t…