5 citations · 5 across the 5 of their papers we have counts for
7 papers
Influence of Radiation and AC Coupling on Time Performance of Analog Pixels Test Structures in 65 nm CMOS technology
Gianluca Aglieri Rinella, Luca Aglietta, Matias Antonelli +44
Monolithic Active Pixel Sensors (MAPS) in advanced CMOS imaging technologies are key to next-generation tracking systems for high-energy physics, where radiation hardness and preci…
Characterization of the H2M Monolithic CMOS Sensor
Rafael Ballabriga, Eric Buschmann, Michael Campbell +29
The H2M (Hybrid-to-Monolithic) is a monolithic pixel sensor manufactured in a modified \SI{65}{\nano\meter}~CMOS imaging process with a small collection electrode. Its design addre…
Characterisation of the first wafer-scale prototype for the ALICE ITS3 upgrade: the monolithic stitched sensor (MOSS)
Omar Abdelrahman, Gianluca Aglieri Rinella, Luca Aglietta +136
This paper presents the characterisation and testing of the first wafer-scale monolithic stitched sensor (MOSS) prototype developed for the ALICE ITS3 upgrade that is to be install…
Impact of the circuit layout on the charge collection in a monolithic pixel sensor
Corentin Lemoine, Rafael Ballabriga, Eric Buschmann +28
CERN's strategic R&D programme on technologies for future experiments recently started investigating the TPSCo 65nm ISC CMOS imaging process for monolithic active pixels sensors fo…
The H2M Monolithic Active Pixel Sensor -- characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology
Sara Ruiz Daza, Rafael Ballabriga, Eric Buschmann +28
The high energy physics community recently gained access to the TPSCo 65 nm ISC (Image Sensor CMOS), which enables a higher in-pixel logic density in monolithic active pixel sensor…
Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process
Gianluca Aglieri Rinella, Luca Aglietta, Matias Antonelli +43
In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high ene…
Characterisation of analogue Monolithic Active Pixel Sensor test structures implemented in a 65 nm CMOS imaging process
Gianluca Aglieri Rinella, Giacomo Alocco, Matias Antonelli +91
Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterise and qualify this process and to optimise…