3 papers
cs.DC2026
Context-aware Simopt-Power: Using structural data with simulation metadata to optimise FPGA designs
Eashan Wadhwa, Georgios Floros, Shanker Shreejith
Pre-implementation behavioural simulation routinely validates functional correctness, yet it also produces rich switching-activity traces that are typically discarded by FPGA compu…
cs.AR2025
Simopt-Power: Leveraging Simulation Metadata for Low-Power Design Synthesis
Eashan Wadhwa, Shanker Shreejith
Excessive switching activity is a primary contributor to dynamic power dissipation in modern FPGAs, where fine-grained configurability amplifies signal toggling and associated capa…
cs.AR2024
Simopt -- Simulation pass for Speculative Optimisation of FPGA-CAD flow
Eashan Wadhwa, Shanker Shreejith
Behavioural simulation is deployed in CAD flow to verify the functional correctness of a Register Transfer Level (RTL) design. Metadata extracted from behavioural simulation could…