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cs.AR2026
ITP-STDP: A Hardware-Efficient Intrinsic-Timing Power-of-Two Synaptic Learning Engine for On-Chip SNNs
Haihang Xia, Xinyu Zhao, Xuecheng Wang +5
Spiking neural networks (SNNs) have the potential to emerge as the third generation of neural networks and have attracted increasing attention across a wide range of applications.…
cs.AR2025
NLS: Natural-Level Synthesis for Hardware Implementation Through GenAI
Kaiyuan Yang, Huang Ouyang, Xinyi Wang +6
This paper introduces Natural-Level Synthesis, an innovative approach for generating hardware using generative artificial intelligence on both the system level and component-level.…