5 papers
TT-Edge: A Hardware-Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI
Hyunseok Kwak, Kyeongwon Lee, Kyeongpil Min +2
The growing demands of distributed learning on resource constrained edge devices underscore the importance of efficient on device model compression. Tensor Train Decomposition (TTD…
LoRA-Edge: Tensor-Train-Assisted LoRA for Practical CNN Fine-Tuning on Edge Devices
Hyunseok Kwak, Kyeongwon Lee, Jae-Jin Lee +1
On-device fine-tuning of CNNs is essential to withstand domain shift in edge applications such as Human Activity Recognition (HAR), yet full fine-tuning is infeasible under strict…
HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices
Sangmin Jeon, Kangju Lee, Kyeongwon Lee +1
Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs e…
Asymptotic Error Bounds and Fractional-Bit Design for Fixed-Point Grover's Quantum Algorithm Emulation
Seonghyun Choi, Kyeongwon Lee, Jongin Choi +1
Quantum computing (QC) emulators, which simulate quantum algorithms on classical hardware, are indispensable platforms for testing quantum algorithms before scalable quantum comput…
Standalone FPGA-Based QAOA Emulator for Weighted-MaxCut on Embedded Devices
Seonghyun Choi, Kyeongwon Lee, Jae-Jin Lee +1
Quantum computing QC emulation is crucial for advancing QC applications, especially given the scalability constraints of current devices. FPGA-based designs offer an efficient and…