activity
20242026
most citedOpen3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation

1 citations · 4 across the 9 of their papers we have counts for

collaborators

9 papers

cs.AR2026

How Can Reinforcement Learning Achieve Expert-level Placement?

Ruo-Tong Chen, Ke Xue, Chengrui Gao +7

Chip placement is a critical step in physical design. While reinforcement learning (RL)-based methods have recently emerged, their training primarily focuses on wirelength optimiza…

cs.AR2026

FlowPlace: Flow Matching for Chip Placement

Peng Xie, Ke Xue, Yunqi Shi +6

Chip placement plays an important role in physical design. While generative models like diffusion models offer promising learning-based solutions, current methods have the followin…

cs.AI2026

Advancing Automated Algorithm Design via Evolutionary Stagewise Design with LLMs

Chen Lu, Ke Xue, Chengrui Gao +5

With the rapid advancement of human science and technology, problems in industrial scenarios are becoming increasingly challenging, bringing significant challenges to traditional a…

cs.AR2025

ReMaP: Macro Placement by Recursively Prototyping and Packing Tree-based Relocating

Yunqi Shi, Xi Lin, Zhiang Wang +8

This work introduces the ReMaP method, which generates expert-quality macro placements through recursively prototyping and packing tree-based relocating. We first perf…

cs.LG2025

BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement

Ke Xue, Ruo-Tong Chen, Rong-Xi Tan +5

Chip placement is a vital stage in modern chip design, and black-box optimization (BBO) has been applied to it for decades. Early BBO efforts, however, were limited by immature pro…

cs.AR2025★ 1 cited

Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation

Yunqi Shi, Chengrui Gao, Wanqi Ren +6

This work introduces Open3DBench, an open-source 3D-IC backend implementation benchmark built upon the OpenROAD-flow-scripts framework, enabling comprehensive evaluation of power,…

cs.AR2025★ 1 cited

Timing-Driven Global Placement by Efficient Critical Path Extraction

Yunqi Shi, Siyuan Xu, Shixiong Kai +4

Timing optimization during the global placement of integrated circuits has been a significant focus for decades, yet it remains a complex, unresolved issue. Recent analytical metho…

cs.LG2024★ 1 cited

Reinforcement Learning Policy as Macro Regulator Rather than Macro Placer

Ke Xue, Ruo-Tong Chen, Xi Lin +4

In modern chip design, placement aims at placing millions of circuit modules, which is an essential step that significantly influences power, performance, and area (PPA) metrics. R…

cs.LG2024★ 1 cited

Escaping Local Optima in Global Placement

Ke Xue, Xi Lin, Yunqi Shi +3

Placement is crucial in the physical design, as it greatly affects power, performance, and area metrics. Recent advancements in analytical methods, such as DREAMPlace, have demonst…