activity
20222026
most citedA shared compilation stack for distributed-memory parallelism in stencil DSLs

10 citations · 15 across the 7 of their papers we have counts for

collaborators

8 papers

cs.DC2026

Lifting to tensors when compiling scientific computing workloads for AI Engines

Nick Brown, Gabriel Rodriguez-Canal

It has been demonstrated that specialised architectures, such as FPGAs and AMD's AI Engines (AIEs), have the potential to deliver energy and performance advantages for scientific c…

cs.DC2025★ 2 cited

An MLIR pipeline for offloading Fortran to FPGAs via OpenMP

Gabriel Rodriguez-Canal, David Katz, Nick Brown

With the slowing of Moore's Law, heterogeneous computing platforms such as Field Programmable Gate Arrays (FPGAs) have gained increasing interest for accelerating HPC workloads. In…

cs.DC2025★ 2 cited

Seamless acceleration of Fortran intrinsics via AMD AI engines

Nick Brown, Gabriel Rodríguez Canal

A major challenge that the HPC community faces is how to continue delivering the performance demanded by scientific programmers, whilst meeting an increased emphasis on sustainable…

cs.DC2024★ 10 cited

A shared compilation stack for distributed-memory parallelism in stencil DSLs

George Bisbas, Anton Lydike, Emilien Bauer +8

Domain Specific Languages (DSLs) increase programmer productivity and provide high performance. Their targeted abstractions allow scientists to express problems at a high level, pr…

cs.DC2023

Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA

Gabriel Rodriguez-Canal, Nick Brown, Maurice Jamieson +3

The challenges associated with effectively programming FPGAs have been a major blocker in popularising reconfigurable architectures for HPC workloads. However new compiler technolo…

cs.DC2023

Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs

Gabriel Rodriguez-Canal, Nick Brown, Tim Dykes +2

In recent years the use of FPGAs to accelerate scientific applications has grown, with numerous applications demonstrating the benefit of FPGAs for high performance workloads. Howe…

cs.DC2023

Task-based preemptive scheduling on FPGAs leveraging partial reconfiguration

Gabriel Rodriguez-Canal, Nick Brown, Yuri Torres +1

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for pro…

cs.AR2022★ 1 cited

Programming abstractions for preemptive scheduling in FPGAs using partial reconfiguration

Gabriel Rodriguez-Canal, Nick Brown, Yuri Torres +1

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for pro…