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cs.AR2026

Rethinking Unified Memory for NPU-PIM Systems: Dual-View Memory for Dynamic Inference of LLM

Shixin Zhao, Lian Liu, Tianhua Han +3

Heterogeneous architectures that combine neural processing unit (NPU) and processing-in-memory (PIM) are increasingly adopted to accelerate LLM inference. Prior work focuses on bui…

cs.AR2026

Ouroboros: Wafer-Scale SRAM CIM with Token-Grained Pipelining for Large Language Model Inference

Yiqi Liu, Yudong Pan, Mengdi Wang +5

Conventional LLM inference architectures suffer from high energy and latency due to frequent data movement across memory hierarchies. We propose Ouroboros, a wafer-scale SRAM-based…

cs.AR2026

PAM: Processing Across Memory Hierarchy for Efficient KV-centric LLM Serving System

Lian Liu, Shixin Zhao, Yutian Zhou +4

The widespread adoption of Large Language Models (LLMs) has exponentially increased the demand for efficient serving systems. With growing requests and context lengths, key-value (…

cs.AR2026

From Buffers to Registers: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Design

Jinxin Yu, Yudong Pan, Mengdi Wang +4

Transformer-based models dominate modern AI workloads but exacerbate memory bottlenecks due to their quadratic attention complexity and ever-growing model sizes. Existing accelerat…

cs.AR2026

A System Architecture for Low Latency Multiprogramming Quantum Computing

Yilun Zhao, Yu Chen, Kaiyan Chang +4

As quantum systems scale, Multiprogramming Quantum Computing (MPQC) becomes essential to improve device utilization and throughput. However, current MPQC pipelines rely on expensiv…

cs.AR2025

Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators

Shixin Zhao, Yuming Li, Bing Li +4

Computing-in-memory (CIM) architectures demonstrate superior performance over traditional architectures. To unleash the potential of CIM accelerators, many compilation methods have…