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20242026
most citedData is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework

59 citations · 60 across the 11 of their papers we have counts for

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5 papers · 1 filter

cs.AR2025

DeepRTL2: A Versatile Model for RTL-Related Tasks

Yi Liu, Hongji Zhang, Yunhao Zhou +3

The integration of large language models (LLMs) into electronic design automation (EDA) has significantly advanced the field, offering transformative benefits, particularly in regi…

cs.AR2025

ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA

Zhengyuan Shi, Zeju Li, Chengyu Ma +19

We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RT…

cs.AR2025

DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model

Yi Liu, Changran Xu, Yunhao Zhou +2

Recent advancements in large language models (LLMs) have shown significant potential for automating hardware description language (HDL) code generation from high-level natural lang…

cs.AR2024

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation

Kaiyan Chang, Zhirong Chen, Yunhao Zhou +9

Natural language interfaces have exhibited considerable potential in the automation of Verilog generation derived from high-level specifications through the utilization of large la…

cs.AR2024★ 59 cited

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework

Kaiyan Chang, Kun Wang, Nan Yang +16

Recent advances in large language models have demonstrated their potential for automated generation of hardware description language (HDL) code from high-level prompts. Researchers…