1 citations · 1 across the 4 of their papers we have counts for
6 papers
SetupKit: Efficient Multi-Corner Setup/Hold Time Characterization Using Bias-Enhanced Interpolation and Active Learning
Junzhuo Zhou, Ziwen Wang, Haoxuan Xia +5
Accurate setup/hold time characterization is crucial for modern chip timing closure, but its reliance on potentially millions of SPICE simulations across diverse process-voltagetem…
Automated SAR ADC Sizing Using Analytical Equations
Zhongyi Li, Zhuofu Tao, Yanze Zhou +4
Conventional analog and mixed-signal (AMS) circuit designs heavily rely on manual effort, which is time-consuming and labor-intensive. This paper presents a fully automated design…
AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detection
Yichen Shi, Zhuofu Tao, Yuhao Gao +5
Current multimodal large language models (MLLMs) struggle to understand circuit schematics due to their limited recognition capabilities. This could be attributed to the lack of hi…
AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuits
Yichen Shi, Ze Zhang, Hongyang Wang +10
Analog/Mixed-Signal (AMS) circuits play a critical role in the integrated circuit (IC) industry. However, automating Analog/Mixed-Signal (AMS) circuit design has remained a longsta…
VFlow: Discovering Optimal Agentic Workflows for Verilog Generation
Yangbo Wei, Zhen Huang, Huang Li +3
Hardware design automation faces challenges in generating high-quality Verilog code efficiently. This paper introduces VFlow, an automated framework that optimizes agentic workflow…
AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG
Yichen Shi, Zhuofu Tao, Yuhao Gao +9
High-performance analog and mixed-signal (AMS) circuits are mainly full-custom designed, which is time-consuming and labor-intensive. A significant portion of the effort is experie…